SELECTED
PUBLICATIONS LAST 5 YEARS
Brubaker, M., J. Staffa, P. Roman, S. Fakhouri, and J. Ruzyllo, "Determination of Native Chemical Oxide Removal in Cluster Compatible Cleaning Systems Using a Surface Photovoltage Technique", Proc. Fifth Intern. Symp. on Cleaning Technol. in Semicond. Device Manufacturing, Eds. J. Ruzyllo and R. Novak , The Electrochem. Soc., PV98-20, 1998, p.408.
Roman, P., J. Staffa, S. Fakhouri. M. Brubaker, K. Torek, E. Kamieniecki, and J. Ruzyllo, "Surface Dopant Concentration Monitoring Using Noncontact Surface Charge Profiling", J. Applied Phys., 83, 538 (1998).
Staffa, J., S. Fakhouri, M. Brubaker, P. Roman, and J. Ruzyllo, "Effects Controlling Initiation and Termination of Gas-phase Cleaning Reactions", Proc. Fifth Intern. Symp. on Cleaning Technol. in Semicond. Device Manufacturing, Eds. J. Ruzyllo and R. Novak, The Electrochem. Soc., PV98-20, 1998, p.315-321.
Brubaker, M., P. Roman, S. Staffa, and J. Ruzyllo, "Monitoring of Chemical Oxide Removal from Silicion Surfaces Using a Surface Photovoltage Technique, Electrochem. and Solid St. Lett., 1, 130 (1998).
Ruzyllo, J., "Second Look at the Role of Dry Wafer Cleaning Technology", Proc. Symp. on Contamination-Free Manufacturing, SEMICON West 1998, Eds. S. Krishnan and A. Busnaina, EMI 1998, p. L1 (invited paper).
Roman, P., M. Brubaker, J. Staffa, E. Kamieniecki, and J. Ruzyllo, "Non-Contact Monitoring of Electrical Characteristics of Silicon Surfaces and Near-Surface Region", Proc. 1998 Intern. Conf. Characterization and Metrology for ULSI Technol., Eds. D.G. Seiler, A.C. Diebold, W.M. Bullis, T.J. Shaffner, R. McDonald, E.J. Walters, AIP Conf. Proc. 449, 1998, pp.250-255.
Staffa, J., S. Fakhouri, M. Brubaker, P. Roman, and J. Ruzyllo, ""Effects Controlling Initiation and Termination of Gas-Phase Cleaning Reactions", J. Electrochem. Soc., 146, 36 (1999).
Ruzyllo, J., E. Rohr, M. Baeyens, T. T. Bearda, P. Mertens, and M. Heyns, "Gas-Phase processing Prior to 3.2 nm gate Oxidation", Ultra Clean Proc. of Silicon Surfaces, Eds. M. Heyns, M. Meuris, and P. Mertens, SCITEC Publications Ltd., 1999, p.85.
Ruzyllo, J., E. Rohr, M. Caymax, M. Baeyens, T. Conard, P. Mertens, and M. Heyns, "Role of UV/Chlorine Exposure During Dry Surface Conditioning Before Integrated Epi Deposition Process", Ultra Clean Proc. of Silicon Surfaces, Eds. M. Heyns, M. Meuris, and P. Mertens, SCITEC Publications Ltd., 1999, p.233.
Lukasiak, L., P.Roman, M. Brubaker, M.Anc, and J. Ruzyllo, "Non-Contact Electrical Characterization of SOI Surfaces", Silion-on-Insulator Technology and Devices IX, Ed. P.L. Hemment, The Electrochem. Soc. PV 99-3, 1999, p. 184
Ruzyllo, J., E. Rohr, M. Baeyens, P. Mertens, and M. Heyns, "Fluorine in Thermal Oxides from the HF Pre-Oxidation Surface Treatment", Electrochem. and Solid St. Lett., 2, 336 (1999)
Roman, P., D.-O. Lee, M. Brubaker, E. Kamieniecki, and J. Ruzyllo, " Characterization of Conductive Oxides on Silicon Using Non-Contact Surface Charge Profiling", Microelectronic Engineering 48, 181 (1999).
Heyns, M., P. Mertens, J. Ruzyllo, and M.Y.M. Lee, "Advanced Wet and Dry Cleaning Coming Together for Next Generation", Solid St. Technol., 42 (3), 37 (1999) (invited paper).
Roman, P., D.-O. Lee, M. Brubaker, E. Kamieniecki and J. Ruzyllo, "Characterization of Conductive Oxides on Silicon Using Non-Contact Surface Charge Profiling: Proc. Intern. Conf. Insulating Films on Semiconductors INFOS '99, Ed. M. Schultz, Springer Werlag. 1999.
Ruzyllo, J., P. Roman, D.O. Lee, M. Brubaker, and E. Kamieniecki, "Gate Dielectric Monitoring Using Non-Contact Electrical Characterization", Proc. SPIE Symp. In-Line Methods and Monitors for Process and Yield Improvement, Eds. S. Ajuria and J.J. Jakubczak, SPIE Vol. 3884, 1999 (invited paper).
Ridley, R. C-T. Wu, P. Roman, G. Dolny, T. Grebs, F. Stensney and J. Ruzyllo, "Thickness Dependent Sensitivity of Gate Oxides to Surface Contamination", Proc. Sixth Intern. Symp. on Cleaning Technol. in Semicon. Dev. Manufacturing, Eds. R. Novak, T. Hattori, and J. Ruzyllo, Electrochem Soc. Proc. Vol. PV 99-36, 2000, p. 158.
Roman, P., C.-L. Tsai, R. Hengstebeck, C. Pantano, J. Berry, E. Kamieniecki, and J. Ruzyllo, "Low-Temperature Atmospheric Ambient Rapid Lamp Cleaning of Silicon Surfaces", Proc. Sixth Intern. Symp. on Cleaning Technol. in Semicon. Dev. Manufacturing, Eds. R. Novak, T. Hattori, and J. Ruzyllo, Electrochem Soc. Proc. Vol. PV 99-36, 2000, p.145.
Lee, D.O., P. Roman, P. Mumbauer, R. Grant, M. Horn, and J. Ruzyllo, "Studies of High-k Gate Dielectrics Deposited by Liquid Source Misted Chemical Deposition Method", Proc. Fifth Intern. Symp. on Low and High Dielectric Constant Materials: Materials Science, Processing, and Reliability Issues., Eds. M.J. Loboda, R. Singh, S.S. Ang and H.S. Rathore, The Electrochem Soc. Proc. Vol. PV 2000-5, 2000, pp. 237-243.
Roman, P., D.O. Lee, P. Mambauer, R. Grant, E.Kamieniecki, and J. Ruzyllo, "Characterization of High-k Dielectrics Using the Non-Contact Surface Charge Profiler (SCP) Method", Proc. Fifth Intern. Symp. on Low and High Dielectric Constant Materials: Materials Science, Processing, and Reliability Issues., Eds. M.J. Loboda, R. Singh, S.S. Ang and H.S. Rathore, The Electrochem Soc. Proc. Vol. PV 2000-5, 2000, pp. 187-193.
Lukasiak, L., P. Roman, J. Ruzyllo, A. Jakubowski, "Characterization of SOI Substrates Using Surface Charge Profiling Method" (in Polish), Proc. Seventh Sci. Conf. Electron Technol., ELTE 2000, Polanica Zdroj, Poland, 2000, p. 406.
Ruzyllo, J. "Surface Processing and Characterization in Silicon Microelectronic Manufacturing" in Global Semiconductor Manufacturing Technology, World Markets Research Center, London, 2001, p.102 (invited paper).
Lukasiak, L., P. Roman, A. Jakubowski, and J. Ruzyllo, "Analysis of Surface and Interface Charge Interactions in SOI Substrates", Solid-State Electronics, 45, 95 (2001).
Ruzyllo, J., D.-O Lee, P. Roman, M. Horn, P. Mumbauer, M. Brubaker, and R. Grant, "Studies of High-k Dielectrics Deposited by Liquid Source Misted Chemical Deposition in MOS Gate Structures", Proc.12 Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference ASMC 2001, April, 23-25, 2001, Munich, Germany, IEEE/SEMI (2001) pp.71-77.
Dolny, G., N. Gollagunta, S. A. Suliman, L. Trabzon, M. Horn, O.O. Awadelkarim, S. J. Fonash, J. Hao, R.S. Ridley, T. Grebs, J. Zeng, C. Kocon and J. Ruzyllo, "Characterization of Gate Oxide Degradation Mechanisms in Trench-Gated Power MOSFETS Using the Charge Pumping Technique", Proc. 13th Intern. Symp. on Power Semiconductor Devices and ICs, ISPCD '01, Osaka, Japan, June 4-7, 2001
Wu, C.-T., R. Ridley, P. Roman, G. Dolny, T. Grebs, J. Hao, and J. Ruzyllo, "The Effect of Surface Treatments and Growth Conditions on Electrical Characteristics of Thick (>50 nm) Gate Oxides", Journal of the Electrochemical Society, 148, F184 (2001).
Suliman, S.A., N. Gallogunta, L. Trabzon, J. Hao, G. Dolny, R. Ridley, J. Benjamin, C. Kocon, J. Zeng, C.M. Knoedler, M. Horn, O.O. Awadelkarim, S.J. Fonash, and J. Ruzyllo, "The Impact of Trench Geometry and Processing on the Performance and Reliability of Low Voltage Power UMOSFETs", Proc. 2001 IEEE International Reliability Physics Symposium, 2001, pp. 308 - 314.
Lukasiak, L., .A. Jakubowski, R. B. Beck, A. Wojtkiewicz, M. Korwin-Pawlowski, and J. Ruzyllo, "Gate Dielectrics for Next Generation Integrated Circuits" (in Polish), Elektronika, 42, 27 (2001)
Wu, C.T., R. Ridley, G. Dolny, T. Grebs, J. Hao, S. Suliman, B. Venkataraman, O. Awadelkarim, R. Williams, P. Roman, and J. Ruzyllo, "Processing of Thick Thermal Gate Oxides in Trenches", Proc. Sixth Intern. Symp. On Silicon Nitride and Silicon Dioxide Thin Insulating Films, The Electrochemical Society, PV-2001-7, 2001, p. 127.
Roman, P., D.O. Lee, P. Mumbauer, R. Grant, J. Tower, E. Kamieniecki, L. Lukasiak and . Ruzyllo, "Characterization of Thin Dielectric Layers Using the Non-Contact Surface Charge Profiler (SCP) Method", Proc. Symp. On Process Control, Diagnostics, and Modeling in Semiconductor Device Manufacturing, Eds. M. D. Allendorf, M. T. Swihart, M. Meyyappan, The Electrochemical Society, PV 2001-13, 2001, p. 207.
Lee, D.-O., P. Roman, C.-T. Wu, W. Mahoney, M. Horn. P. Mumbauer, M. Brubaker, R. Grant, and J. Ruzyllo,"Studies of Mist Deposited High-K Dielectrics for MOS Gates", Microelectronic Engineering, 59, 405 (2001).
Le Roux, V., G. Machicoane, G. Borsoni, M. L. Korwin-Pawlowski, N Bechu , S.Kerdiles R. Laffitte, L. Vallier, P. Roman, and J. Ruzyllo, " Etching of Silicon Native Oxide Using Ultra Slow Multicharged Arq+ Ions", Proc. Seventh Intern. Symposium. on Cleaning Technol.. in Semiconductor Device Manufacturing, Eds. J. Ruzyllo, T. Hattori, R. Opila, and R. Novak, Electrochem Soc. Proc. Vol. PV 2001-26, 2002, pp. 249-257.
Roman, P, D-O. Lee, J. Wang, C-T. Wu, V. Subramanian, M. Brubaker, P. Mumbauer, R. Grant and J. Ruzyllo, " Gas-Phase Surface Conditioning in a High-k Gate Stack Cluster",, Proc. Seventh Intern. Symp. on Cleaning Technol. in Semicon. Dev. Manufacturing, Eds. J. Ruzyllo, T. Hattori, R. Opila, and R. Novak, Electrochem Soc. Proc. Vol. PV 2001-26, 2002, 241-248.
Ruzyllo, J., "Gas-Phase Surface Conditioning", Proc. Tech. Session Ultra High Purity: Alternative Cleaning Processes, SEMICON Europa 2002, SEMI (in press).(invited paper)
Lee, D.-O., P. Roman, C.-T. Wu, P. Mumbauer, M. Brubaker, R. Grant, and J. Ruzyllo, "Mist Deposited High-k Dielectrics for Next Generation MOS Gates", Solid-State Electronics, 46, 1671 (2002)
J. Jiang, O.O. Awadelkarim, D.-O.Lee, P. Roman and J. Ruzyllo, "On the Capacitance of Metal/High-k Dielectric Material Stack/Silicon Structures", Solid State-Electronics, 46, 1991 (2002).
Wu, C.-T., R. S. Ridley Sr., G. Dolny, T. Grebs, C. Knoedler, S. Suliman, B. Venkataraman, O. Awadelkarim, and J. Ruzyllo, "Growth and Reliability of Thick Gate Oxide in U-Trench for Power MOSFET's" , Proc. 14th Intern. Symp. On Power Semicond. Dev. and ICs, 2002, pp. 149-152.
Danel, A., C.-L. Tsai, K. Shanmugasundaram, F. Tardif, E. Kamieniecki and J. Ruzyllo, "Cleaning of Si Surfaces by Lamp Illumination", Proc. Sixth Intern. Symp. Ultra-Clean Proc. of Silicon Surfaces, UCPSS 2002, in Solid State Phenomena, Vol. 92, 2003, pp.195-199.
Wu, C.-T., A. Mieckowski, R.S. Ridley, G. Dolny, T. Grebs, J. Linn, and J. Ruzyllo, "Effect of Nitridation on the Reliability of Thick Gate Oxides", Microelectronic Reliability, 43, 43 (2003).
Tsai, C.-L., P. Roman, C.-T. Wu, C. Pantano, J. Berry, E. Kamieniecki and J. Ruzyllo, "Control of Organic Contamination on Silicon Surface Using White Light Illumination", Journal of the Electrochemical Society, 150, G39 (2003).
Wang, J., P. Roman, and J. Ruzyllo, "Surface Charge Evolution During Early Stage of Thermal Oxidation of Silicon", Electrochemical and Solid State Letters, 6, G63 (2003).
Suliman, S.A., B. Venkataraman, C.-T. Wu, R.S. Ridley, G.M. Dolny, O.O. Awadelkarim, S. Fonash, and J. Ruzyllo, "Electrical Properties of the Gate Oxide and its Interface with Si in U-Shaped Trench MOS Capacitors: The Impact of Polycrystalline Si Doping and Oxide Composition", Solid State Electronics, 46, (2003).
Lukasiak, L., E. Kamieniecki, A. Jakubowski, and J. Ruzyllo, "Feasibility of Surface Photo-Voltage Based Characterization of Ultra-Thin SOI Wafers", Silicon on Insulator Technology and Devices XI, Ed. S. Cristoloveanu, Electrochem. Soc. PV 2003-05, 2003, pp. 425-430.
Chang, K., D.-O. Lee, K. Shanmugasundaram, P. Roman, J. Shallenberger, J. Wang, P. Mumbauer, R. Grant, and J. Ruzyllo, "Effect of Thermal Anneal on Mist Deposited HfSiO4/SiOx/Si Structures", Advanced Short-Time Thermal Processing for Si Based CMOS Devices, Electrochem Soc. PV 2003- , 2003, pp. (in print).
Chang, K., K. Shanmugasundaram, D.O. Lee, P. Roman, C.-T. Wu, J. Wang, J. Shallenberger, P. Mumbauer, R. Grant, R. Ridley, G. Dolny , and J. Ruzyllo, "Silicon Surface Treatments in Advanced MOS Gate Processing", Microelectronic Engineering, (in print).
Le Roux, V., G. Machicoane, G. Borsoni, M. L. Korwin-Pawlowski, N Bechu , S.Kerdiles R. Laffitte, L. Vallier, P. Roman, and J. Ruzyllo, " Etching of Silicon Native Oxide Using Ultra Slow Multicharged Arq+ Ions", Journal of the Electrochemical Society (accepted for publication).